DSSSB TGT CS 2023 Shift 2 – Question 107

The given diagram expresses _______.

• Parallel-In Parallel-Out Shift Register
• Serial-In Parallel-Out Shift Register
• Serial-In Serial-Out Shift Register
• Parallel-In Serial-Out Shift Register

In digital electronics, shift registers are classified according to how data is inputted and outputted:

1. Parallel-In Parallel-Out (PIPO): Data is input simultaneously into all flip-flops (each D flip-flop has a dedicated input line) and read simultaneously from each flip-flop (each Q terminal has an individual output line) on a common clock pulse.
2. Serial-In Serial-Out (SISO): Data enters bit-by-bit through one input and exits bit-by-bit from one output.
3. Serial-In Parallel-Out (SIPO): Data enters serially bit-by-bit and is read simultaneously from all outputs.
4. Parallel-In Serial-Out (PISO): Data enters in parallel and is shifted out serially.

In the given diagram, each of the four D flip-flops has its own individual input line at the top labeled ‘INPUTS’ and its own separate output line at the bottom labeled ‘OUTPUTS’, driven by a common clock. Hence, it is a Parallel-In Parallel-Out (PIPO) Shift Register.

Hence, option 1 is the correct answer.